Modern semiconductor fabrication involves aligning silicon wafers and photolithography masks to nanometre precision. As the industry shifts from using 200 mm diameter wafers to 300 mm wafers, ...

Parallel piezo aligners with fly height sensors enable faster PIC wafer testing.

“EV Group's GEMINI FB fusion wafer bonding platform is the de facto industry standard for CMOS image sensor production, and already leads the industry in wafer-to-wafer alignment accuracy due to our ...

Semiconductor circuits (patterns) printed on semiconductor wafers (substrates) are shrinking, while such substrates are becoming larger in physical size. Over the years, the inspection of patterned ...

One of the contributors to layer-to-layer overlay in today’s chip manufacturing process is wafer distortion due to thin film deposition. Mismatch in the film specific material parameters (e.g., ...

With a focus on parallel optimization and nanoscale accuracy, precision positioning specialist PI is streamlining the optical alignment, test and packaging of quantum photonic devices Parallel lines: ...

Wafer-to-wafer bonding is an essential process step to enable 3D devices such as stacked DRAM, memory-on-logic and future CMOS image sensors. At the same time, minimizing the dimensions of TSVs, which ...