[Editor's note: For an intro to fixed-point math, see Fixed-Point DSP and Algorithm Implementation. For a comparison of fixed- and floating-point hardware, see Fixed vs. floating point: a surprisingly ...

The uM-FPU64 floating point coprocessor chip provides support for IEEE 754-compatible, 64-bit floating point and integer calculations, expanded digital I/O, and analog input capabilities as well as ...

In this video from the Conference on Next Generation Arithmetic (CoNGA) conference in Singapore, Peter Lindstrom from Lawrence Livermore National Laboratory presents: Universal Coding of the Reals: ...

The GRFPU is an IEEE-754 compliant floating-point unit, supporting both single and double precision operands. The pipelined design combines high throu ...

In this video from the HPC Advisory Council Australia Conference, John Gustafson from the National University of Singapore presents: Beating Floating Point at its own game – Posit Arithmetic. “Dr.

Most AI chips and hardware accelerators that power machine learning (ML) and deep learning (DL) applications include floating-point units (FPUs). Algorithms used in neural networks today are often ...

Here we provide rational for using Centar’s floating-point IP core for the new Altera Arria 10 and Stratix 10 FPGA platforms. After a short contextual discussion section, a comparison of various FFT ...