How a $13 adapter changes old laptop DDR4 memory into usable desktop DIMMs

The Ashata adaptor efficiently converts old DDR4 laptop memory into desktop-compatible DIMMsUsers save money by reusing ...
EDN

How To Interface DDR-II SRAMs with Stratix II Devices

Synchronous static RAM (SRAM) architectures are evolving to support the high-throughput requirements of communications, networking, and digital signal processing (DSP) systems. Previous Sync SRAM ...
EDN

Debugging DDR memory interfaces using area-based triggers

DDR bus protocol allows signals to go idle, or tri-state, when they are not active. When debugging or performing JEDEC conformance measurements on the DDR interface, it is often necessary to perform ...
Electronic Design

Eye-Diagram Analysis Speeds DDR SDRAM Validation

Double-data-rate synchronous dynamic random access memory (DDR SDRAM) physical-layer testing is a crucial step in making sure devices comply with the JEDEC specification. The ultimate goal is to ...
Electronic Design

A Summary Of The DDR Memory Controller Standard—Wait, There Isn’t One!

The number of systems-on-a-chip (SoCs) that require an interface to off-chip memory is increasing. As a result, more and more designers are turning to double-data-rate (DDR) SDRAM interfaces such as ...
Ars Technica

Geforce3 - 256-bit memory interface?

Just saw this over at HardOCP, and thought it was quite interesting:<P><BLOCKQUOTE><font size="-1">quote:</font><HR> Take the difference (168 for the math impaired ...