sciencex

Imec Demonstrates Capacitor-less IGZO-Based DRAM Cell With >400s Retention Time

This week, at the 2020 International Electron Devices Meeting, imec, a world-leading research and innovation hub in nanoelectronics and digital technologies, presents a novel dynamic random-access ...
Semiconductor Engineering

Manufacturing Bits: Feb. 2

At the recent 2020 International Electron Devices Meeting (IEDM), Imec presented a paper on a novel capacitor-less DRAM cell architecture. DRAM is used for main memory in systems, and today’s most ...
Electronic Design

Scaling The 1T DRAM Cell

One-transistor, one-capacitor (1T-1C) DRAM cells have been commercially implemented since at least 1999. They save die area compared to conventional 6-T DRAM cells, use less power, yield better, and ...
EDN

Toshiba builds 128-Mbit capacitorless DRAM

TOKYO — Toshiba Corp. has fabricated a 128-Mbit capacitorless DRAM on an SOI wafer and verified operation of the chip. Toshiba reported on the 128-Mbit capacitorless DRAM design and result of the ...
Design-Reuse

Merged-logic-type embedded DRAM suits high-performance SoCs

To push access times toward those of SRAM while achieving much higher densities, embedded DRAM needs a structure that differs from both commodity DRAM and conventional embedded DRAM. The challenge is ...