Previously, I have addressed the component packaging problems found in FPGAs and perhaps given the impression that other packages were OK. However, after attending Memcon in Santa Clara in November, I ...
In September, Rambus announced the achievement of reaching 4 gigabits per second (Gbps) operation with our HBM2E memory interface. This milestone was demonstrated in silicon and required mastering ...
The use of memory-heavy IP in SoCs for automotive, artificial intelligence (AI), and processor applications is steadily increasing. However, these memory-heavy IP often have only a single access point ...
Next-generation automotive systems are advancing beyond the limits of currently available technologies. The addition of advanced driver assistance systems (ADAS) and other advanced features requires ...
Why a new memory interface is needed. Features and benefits of DDR5. How DDR5 will usher in a new era of composable, scalable data centers. The move to DDR5 will probably be more important than most ...
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